FPGA Verification Engineer

On-site in Rochester

9+ month contract

Job ID S-698

FPGA Verification Engineer to support ongoing embedded system development for several current and next-gen radio products. These radio developments include complex FPGA designs targeted to a variety of FPGA vendors/devices. The initial contract is anticipated to last 9+ months with extensions likely.

The FPGA Verification Engineer will be an integral part of the CODE Waveform FPGA Development Team. This individual will be assigned tasks primarily associated with FPGA verification but may also be required to assist with requirements definition, test bench architecture, and documentation. FPGA verification tasks will be performed under the direction of the project FPGA development lead. Assigned tasks will predominately involve FPGA verification but may include FPGA test or documentation tasks.

Key FPGA Verification Tasks:

Design, generation, or modification of self-checking System Verilog Test Benches to verify functional requirements per FPGA Specifications/Requirements

FPGA Documentation

Generation and Review of FPGA Requirements and Specifications

Generation and Review of FPGA Verification Plans

Generation and Presentation of FPGA Verification Plan reviews

FPGA Integration and Test

Support of Integration and testing of requirements on target hardware

Must Have:

10+ years of digital logic design and FPGA/ASIC experience

Working knowledge and proficiency in VHDL and System Verilog coding for self-checking test bench development

Working knowledge and experience with Xilinx Vivado development suite

Familiarity with OVM/UVM verification methodologies

Solid Technical writing/communication skills

This position is part of a contact governed by US DoD and ITAR regulations and therefore requires full US citizenship for consideration. 3rd party applications will not be accepted, and we do not work C2C with any recruiting agencies or staffing firms.